MD5 Hashing Core

AltraCores MD5 Core is a direct hardware embodiment of Ron Rivest’s original MD5 hashing algorithm as defined in RFC 1321. They enabe a state of the art FPGA or ASIC solution for cryptographic hash function with 128-bit hash value. AltraCores hardware implementation of MD5 is in the form of standalone soft cores that perform the cryptographic hash function. AltraCores MD5 Core is designed to reduce the processing overhead of high-speed data hashing. AltraCores MD5 Core can be easily integrated along with other AltraCores Cores into the AltraFlex platform for a flexible, scalable and cost-effective solution.

• Throughput: 750 Mbps – 11.5 Gbps on the AltraFlex Platform
• Resources: 3,143 ALUTs (Stratix IV)

AltraCores MD5 Core is provided with the following deliverables:

• Verilog RTL source code
• Verilog test bench and test scripts
• Detailed user manual
• Synthesis and timing constraints
• Layout and DFT guidelines
• Optional C and System C model
• Optional aggregation interface wrapper