SHA-1 and SHA-2 Hashing Cores
AltraCores SHA-1 and SHA-2 Cores implement the FIPS PUB 180-1 and FIPS PUB 180-2 standard respectively. These cores, implement an FPGA or ASIC solution for standard cryptographic hash functions. AltraCores SHA-1 and SHA-2 Cores are designed to reduce the processing overhead of high‐speed data hashing.
AltraCores SHA-1 Core
- Implements SHA-1 secure hash algorithm, compliant with FIPS PUB 180
- Fully conformant with NIST’s software algorithm
- Compact footprint – fast operation
- Performs automatic message length calculation and padding insertion
- Optional state unload/reload feature for handling fragmented messages
AltraCores SHA-2 Core
- Implements SHA-224, SHA-256, SHA-384 and SHA-512 secure hash algorithms to FIPS 180-2
- Fast operation – 2.0Gbps for SHA-384/512, 1.2Gbps for SHA-224/256 in
Stratix IV
- Performs automatic message length calculation and padding insertion
- Optional state unload/reload feature for handling fragmented messages
- Compact footprint – 4500 ALUTs and 540 Memory bits (Stratix IV)
AltraCores SHA Hashing IP cores come complete with:
- Verilog RTL source code
- Verilog test bench and test scripts
- Synthesis and timing constraints
- Optional C and System C model
- Optional aggregation interface wrapper
|

|
AltraCores™ SHA-2 Core
These cores implement an FPGA or ASIC solution for standard cryptographic hash functions (SHA-224, SHA-256, SHA-512, and SHA-384).
AltraCores™ SHA-2 Core
|

|
AltraCores™ SHA-1 Core
The AltraCores SHA-1 IP Core implements the FIPS PUB 180-3 Secure Hash Standard SHA-1.
AltraCore SHA-1 Data Brief 2106_01.pdf
|
|
|
|
|
|
|
|
|