Overview

CebaTech is focused on creating products that overcome several obstacles that semiconductor designers encounter in developing complex silicon. Products include both general-purpose ESL design tools and high-value intellectual property (IP) blocks targeted at selected industries such as networking and storage.

While the ecosystem around semiconductor design (shrinking silicon geometries, growing FPGA capacities, and system-on-chip (SoC) techniques) has enabled more and more complex function to be moved into silicon, the design process itself has become an impediment to engineering productivity and the realization of the full application potential of modern integrated circuits (ICs). Reducing design risks, potential re-spins and costs are objectives common to every hardware/chip development team. And yet growing complexity of design often is addressed by adding more resources to the design team - a solution that is neither efficient nor cost-effective.

For the most part, the tools used to accomplish semiconductor design description, particularly those tools at the front end of the design process, have not materially advanced in over a decade. Consequently today's complex chips are still developed using the manual, register transfer level (RTL) hardware description language (HDL) established for simpler systems. And verification of the RTL designs is an ever-growing, labor-intensive process requiring circuit simulators and customized stimulus, that becomes progressively more self-limiting as design scope or complexity expands.

CebaTech has tackled the challenge at the front end of the design process with a new, breakthrough-technology — the C2R Compiler™. C2R is at the center of a design method that uses untimed ANSI C as its starting point and then scores three industry-leading innovations:

  • By providing complete support for the C language, including its most abstract and powerful capabilities.
  • By incorporating a linker function that enables scaling of design size — with competitive quality of results (QoR); and, significantly
  • By placing functional verification at the front-end of the design process — and achieving 95% coverage in the C software environment vs. traditional circuit simulators.

In addition to licensing the C2R Compiler to design teams worldwide, CebaTech also develops and offers its own C2R Compiler- generated IP blocks, the CebaIP™ family of cores, for licensing by hardware developers in markets that include data storage and networking. Current IP core offerings include GZIP/GunZip Data Compression/Decompression.

The CebaTech approach to both tools and IP offers extremely high value to companies engaged in complex digital IC development by accelerating time to market, revenue and profits.