CebaTech's Technology BreakthroughPage 1 | Page 2 | Page 3CebaTech's Technology BreakthroughInstead of manpower-centric RTL, with its requirement for separate verification teams, CebaTech uses a software language (ANSI C) to describe and then verify hardware. The value in this approach derives from the fact that software languages are highly descriptive and readable, and the software verification environment is orders of magnitude faster than the equivalent hardware verification process. With ANSI C as the starting point, the C2R Compiler automatically generates synthesizable Verilog™ RTL compatible with industry standard back-end tools. CebaTech selected ANSI C as the input language for hardware design because the data types in C — structs, unions, complex arrays, with pointers and nesting, etc. — have direct and intuitive mappings to hardware and are appropriate abstractions for the elements of hardware systems. The C language, when operating in a non-preemptive threads environment, provides a very powerful HDL perfectly suited for SoC design of any scope. The C2R Compiler's support of the ANSI C language and multi-threaded software development environments includes:
The breadth of support for the ANSI C language by the C2R Compiler enables it to successfully bridge the "semantic chasm" between sequential software models and parallel hardware design. Using ANSI C as the design language for the C2R Compiler achieves several additional objectives as well. ANSI C:
The C2R Compiler's breadth of support for the abstractions within the ANSI C programming language enables it to produce accurate parallel hardware designs directly from sequential software models. Page 1 | Page 2 | Page 3 |
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